The present invention relates to a MOS semiconductor device such as a MOSFET (insulated-gate field-effect transistor) or an IGBT (insulated-gate bipolar transistor) having a polysilicon gate electrode and a bipolar semiconductor device using such a gate electrode material such as polysilicon in which a bidirectional Zener diode for protecting the semiconductor device from an overvoltage that is higher than a prescribed voltage is formed between the gate electrode and a main electrode by utilizing a polysilicon layer. The term “bidirectional” is equivalent to “bidirectional blocking” (the same applies to the following description).
Conventionally, in MOSFETs having a polysilicon gate electrode, a protection diode such as a bidirectional Zener diode is inserted between the gate and source or between the gate and drain as a measure to prevent electrostatic breakdown of the gate insulating film. This protection diode may be formed in a peripheral portion of an active region or along the outer circumference of a gate electrode pad as in a conventional MOS semiconductor device having a protection diode shown in FIGS. 7A-7D and FIG. 8. There is a problem that if the area of the Zener diode is increased to increase the electrostatic discharge capability (ESD capability), the area of the active region which relates to the main current capacity is decreased and the on-resistance is thereby increased.
A description will be made of the conventional MOS semiconductor device having a protection diode that is shown in FIGS. 7A-7D and FIG. 8. FIG. 7A is a plan view of the MOS semiconductor device (chip) having a protection diode. Symbol S denotes a source metal electrode 8 or a terminal and symbol G denotes a gate metal electrode pad 9 or a terminal. FIG. 7B is an enlarged plan view of a portion enclosed by a broken-line frame a in FIG. 7A and including the gate metal electrode pad 9. In FIG. 7B, a ring-shaped Zener diode region 10 is seen through the overlaying layers. FIG. 7C is an enlarged plan view of a portion enclosed by a broken-line frame b in FIG. 7B and shows pn junctions constituting a Zener diode, contact holes 7-1 and 7-2 through which connection is made to the source and the gate, respectively, of the MOS semiconductor device, and an interlayer insulating film 7 which isolates the source metal electrode 8 (seethrough) from the gate metal electrode pad 9 (seethrough). FIG. 7D shows an equivalent circuit of the MOS semiconductor device having a protection diode shown in FIG. 7A. FIG. 8 is an enlarged sectional view taken along line K-K′ in FIG. 7B.
In this MOS semiconductor device having a protection diode, as shown in FIG. 8, p-wells 2 are formed selectively in a drift layer 1 (which is a high-resistivity n-type silicon epitaxial layer grown on a low-resistivity n-type silicon substrate 100) adjacent to its surface and a p+ contact region 3 and high-concentration n++ source regions 4 are formed selectively in each p-well 2 adjacent to its surface. A gate electrode 6 which is a low-resistivity polysilicon layer is formed on the surface of each portion of the drift layer 1 that is located between n++ source regions 4 via a gate insulating film 5 of about 1,000 Å in thickness. The gate electrodes 6 are covered with the interlayer insulating film 7 from above. Unit cells each having a p+ contact region 3, high-concentration n++ source regions 4, and a polysilicon gate electrode 6 are formed at a high density adjacent to the surface of the active region which is a main operation region. The polysilicon gate electrodes 6 extend from the respective unit cells and are connected to the gate metal electrode pad 9 together. Openings each of which exposes the surfaces of both of the n++ source regions 4 and the p+ contact region 3 of the corresponding unit cell are formed through the interlayer insulating film 7. Contact is made to the source metal electrode 8 through these openings. The Zener diode 10 in which multi-stage pn junctions are formed in series is formed in a polysilicon layer under the source metal electrode 8 and the gate metal electrode pad 9 with the interlayer insulating film 7 interposed in between. Only the portion of the interlayer insulating film 7 that insulation-isolates the source metal electrode 8 from the gate metal electrode pad 9 and is seen between them in the enlarged plan view of FIG. 7B is hatched in FIG. 7B. The rectangular-ring-shaped region in FIG. 7B is the Zener diode 10 as seen through the overlaying layers. As shown in FIG. 7C, in the Zener diode 10, openings 7-1 and 7-2 are formed through the interlayer insulating film 7 so as to obtain a necessary diode breakdown voltage (e.g., several volts to tens of volts) by selecting the number of stages of pn junctions properly. Contact to the source metal electrode 8 is made through the source-side opening 7-1 and contact to the gate metal electrode pad 9 is made through the gate-side opening 7-2, whereby the Zener diode 10 is connected between the gate and the source of the MOS semiconductor device.
With this configuration, when a voltage that is higher than the diode breakdown voltage that is set as described above is applied to the Zener diode 10, the Zener diode 10 breaks down and thereby prevents an event that a voltage higher than the diode breakdown voltage is applied to the gate. Electrostatic breakdown of the gate insulating film 5 is thus prevented. To prevent breakdown (thermal destruction) of the Zener diode 10 itself, the pn junctions of the Zener diode 10 should have a sufficient area.
As described above, the protection Zener diode that is inserted between the gate and the source of a conventional semiconductor device to prevent electrostatic breakdown of the gate insulating film is a single Zener diode formed in an outer peripheral portion of the active region as a main operation region or along the outer circumference of the gate electrode pad to increase its length and thereby increase its junction area or a Zener diode which is bent back and consists of multi-stage pn junctions connected to each other in series to attain a necessary breakdown voltage. When necessary, a Zener diode may be inserted as a clamp diode between the gate and the drain in addition to between the gate and the source.
On the other hand, a MOSFET is well known in which the gate-source electrostatic discharge capability is increased by inserting a gate resistor (JP-A-2006-93505).
JP-A-2001-257349 has a statement to the effect that inserting a resistor or a Zener diode to prevent electrostatic breakdown of a semiconductor device raises a problem of decreasing the area of an effective operation region.
Furthermore, a semiconductor device is known in which Zener diodes for preventing electrostatic breakdown of a semiconductor device are formed in polysilicon layers provided along the outer circumference of an electrode pad and the outer circumference of a chip so that the Zener diodes of each set are connected to each other in series (Japanese Patent No. 3,869,580).
However, where a protection Zener diode is formed along the outer circumference of a gate electrode pad, since the area of the gate electrode pad is much smaller than that of an active region, the circumferential length of the gate electrode pad having an ordinary size cannot increase the diode area beyond a certain limit. If it is intended to further increase the gate-source or gate-drain ESD capability (electrostatic discharge capability) in the case where it is insufficient, it is necessary to increase the area of the gate electrode pad. However, this raises a problem that the area of the active region is decreased relatively and the on-resistance is increased. Where a protection Zener diode whose one end is electrically connected to the source region is formed in an outer peripheral portion of an active region, since the Zener diode and the active region have different surface structures, to give the Zener diode a simple structure the entire outer periphery of the active region needs to be used as the Zener diode. The area of the active region is decreased accordingly and the on-resistance is increased as in the above case.
In view of the above, it would be desirable to provide a semiconductor device capable of increasing the electrostatic discharge capability between the gate electrode and one of the main electrodes while suppressing an increase of the on-resistance.